2026-07-01 15:45:36 +01:00
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; archy-messh Phase 1 firmware — single Heltec WiFi LoRa 32 V3, one SX1262
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; time-multiplexed across the Meshtastic / MeshCore / Reticulum PHY configs.
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;
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; See ../docs/ARCHITECTURE.md §2-§3 for why Phase 1 is a single time-multiplexed
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; radio (Option A) rather than the 3-separate-boards host bridge of Phase 0.
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;
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; Versions pinned exactly — do not float.
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[env:heltec_wifi_lora_32_V3]
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platform = platformio/espressif32@7.0.1
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board = heltec_wifi_lora_32_V3
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framework = arduino
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monitor_speed = 115200
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monitor_filters = time, default
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build_flags =
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-D ARCHY_MESSH_FW
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lib_deps =
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jgromes/RadioLib@7.7.1
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2026-07-01 16:02:33 +01:00
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olikraus/U8g2@2.36.18
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2026-07-01 18:07:05 +01:00
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rweather/Crypto@0.4.0 ; Ed25519 / Curve25519 for MeshCore identity + signing
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