; archy-messh Phase 1 firmware — single Heltec WiFi LoRa 32 V3, one SX1262
; time-multiplexed across the Meshtastic / MeshCore / Reticulum PHY configs.
;
; See ../docs/ARCHITECTURE.md §2-§3 for why Phase 1 is a single time-multiplexed
; radio (Option A) rather than the 3-separate-boards host bridge of Phase 0.
;
; Versions pinned exactly — do not float.

[env:heltec_wifi_lora_32_V3]
platform = platformio/espressif32@7.0.1
board = heltec_wifi_lora_32_V3
framework = arduino
monitor_speed = 115200
monitor_filters = time, default
build_flags =
    -D ARCHY_MESSH_FW
    -D ED25519_NO_SEED       ; vendored orlp/ed25519 without host-only seed.c
lib_deps =
    jgromes/RadioLib@7.7.1
    olikraus/U8g2@2.36.18
    rweather/Crypto@0.4.0        ; Ed25519 / Curve25519 for MeshCore identity + signing